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Massimo Manca

Low-Power Design: MCU Software

Massimo Manca
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Robotics Developer
Robotics Developer
1/23/2013 9:26:36 PM
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Program Manager
Re: Compiler effects on power consumption
ASEEMOV, thanks for the pointer to the article.  It was well written and brought back memories of the chip design days with the discussion of the multiple power sections. I remember the bigger issue for ASICs was leakage current, quite the killer.  Shutting off the power to various sections was the best way to combat this power killer.

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ASEEMOV
ASEEMOV
1/23/2013 1:00:04 PM
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Program Manager
Re: Compiler effects on power consumption
Though the core clock frequencies in case of MCUs haven't dramatically increased, I do see a move towards using on-chip accelerators that are application specific or tuned to a bunch of targeted applications - automotive etc. These accelerators are highly compute intense units [MACs] hence power efficient design is also crucial. Automatic clock gating can be very useful to save power / power profile when certain accelerators or peripherals are idle. Came across a nice article: http://www.atmel.com/Images/doc7903.pdf

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Robotics Developer
Robotics Developer
1/22/2013 8:28:49 AM
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Program Manager
Re: Compiler effects on power consumption
ASSEMOV, you bring up a great issue!  The typical clocking speed differental between MCUs of 200Mhz versus the DSPs/GPUs/CPUs ranging from 1Ghz to multiple is significant.  Given the power equation of CVF2 the frequency plays into the power numbers as a square.  I can really see where the dynamic clocking could save power and provide the variable performance needed in operation.

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ASEEMOV
ASEEMOV
1/21/2013 8:39:06 AM
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Program Manager
Re: Compiler effects on power consumption
I think so far - at least until recently most MCU cores were being clocked at around 200MHz whereas, in case of DSPs that I mentioned earlier, the core speeds have touched 1GHz dual core mark - maybe even beyond that. A lot of SOCs targeted for smart phones have their cores clocked at 1.6GHz and more. This is where dynamic modes are most energy/battery savers specially considering the products these SOC are targeted towards. Multiple power domain designs to support various low power modes are quite common in MCUs though..

 

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Robotics Developer
Robotics Developer
1/19/2013 9:09:20 PM
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Program Manager
Re: Compiler effects on power consumption
ASEEMOV, your comments are very encouraging!  I would love to see the dynamic peripheral configurations, variable clock frequency capabilities extended to all MCUs not just a few selections.  Perhaps, if a SDK vendor is listening they might pick up on the general customer need for a development tool chain that provides these power saving hardware based configuration "tricks" for all the major MCU families.  I would think that SDK would be a real market winner.

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ASEEMOV
ASEEMOV
1/16/2013 8:12:59 AM
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Program Manager
Re: Compiler effects on power consumption
In most cases the on-chip peripherals or controllers are by default disabled and the code when requires them should enable and configure these controllers/peripherals. Example: serial ports being used to talk to a codecchip on the board; DDR controller etc. Variable core clock and variable core frequency [using PLL] do exist and support for these feautres exists on-chip. The can be used to dynamically change the core voltage and core frequency to save power when required. This feaure is over and above the fixed power saving modes available in the processors - Example: look at Blackfin processor by Analog devices. There are some processors that use dynamic automatic clock gating which is a hardware IC feature. Clock to various peripherals/controllers is gated based on activity-no activity on the peripheral. __av

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Massimo Manca
Massimo Manca
1/1/2013 5:22:04 PM
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Blogger
Re: Compiler effects on power consumption
I saw FreeRTOS low power mode but it is not the 1st time I saw this type of implementation. About the efficiency of tickless RTOS is quite advantageous compared to every normal RTOS and more or less 25% then RTOS with idle task managing low power mode. There are also tickless scheduler implementations for Linux that show 75% improvement in power consumption compared with standard Linux scheduler. I really think that tickless scheduler algorithms and deferral timers are powerful ideas to investigate in low power applications. I think FreeRTOS should offer a tickless scheduler as an option, should be a very good idea.

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www.FreeRTOS.org
www.FreeRTOS.org
1/1/2013 3:14:17 PM
User Rank
Bit twiddler
Re: Compiler effects on power consumption
A pure tickless approach is not always the most energy efficient as the math required to calculate the next wake time, and to calculate the time actually spent asleep when woken by an unpredictable interrupt, can be costly.  Also going into and out of low power modes can be time consuming and (ironically) power costly if the sleep time is too short to warrant the low power selection.

FreeRTOS includes a tickless idle mode.  That allows the standard operating mode (with tick) to continue unless the predicted next wake time is a pre-defined time in the future, in which time the tick is turned off and an interrupt set to wake at the predetermined time in the future.

Hooks are added in on sleep and wake to allow user defined code to be added in, for example the user may wish to turn certain peripherals off on entering sleep and keep others running.  It is meant to be as flexible as possible for fine tuning.  More info is here:

http://www.freertos.org/low-power-tickless-rtos.html

and

http://www.freertos.org/low-power-cortex-rtos.html

...yes I'm a FreeRTOS person, but this is not a commercial plug, its free!

 

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Massimo Manca
Massimo Manca
12/31/2012 10:26:45 AM
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Blogger
Re: Compiler effects on power consumption
There are already some compiler vendors as IAR and Hitex that are involved in low power design and companies as ARM, NXP and EnergyMicro that are interested to low power design at compiler level so I think they need not more then 2 years to put something new on the market. ARM is also maintaining a GCC compiler release and also is starting to rewrite the C standard libraries so a lot of news are coming.

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ASEEMOV
ASEEMOV
12/31/2012 10:25:15 AM
User Rank
Program Manager
Re: Compiler effects on power consumption
Who has the lowest power MCU? --> http://www.eetimes.com/electronics-blogs/other/4370908/In-search-of-the-lowest-power-MCU A nice article. __av

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Page 1 / 4   >   >>
More Blogs from Massimo Manca
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Continuing his low-power series, Massimo discusses power minimization in standby and sleep modes.
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